kicad

Name: kicad
Author: aklofas

451installs59forks

How to install kicad?

aklofas/kicad-happy/kicad

$npx -y skills add aklofas/kicad-happy --skill kicad

Installs into the current project.

Summary

Analyze KiCad projects and PDF schematics: schematics, PCB layouts, Gerbers, footprints, symbols, netlists, and design rules. Reviews designs for bugs, traces nets, cross-references schematic to PCB, extracts BOM data, checks DRC/ERC, DFM, power trees, and regulator circuits. Eve

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SKILL.md

1	# KiCad Project Analysis Skill
2
3	## Related Skills
4
5	\| Skill \| Purpose \|
6	\|-------\|---------\|
7	\| `bom` \| BOM extraction, enrichment, ordering, and export workflows \|
8	\| `digikey` \| Search DigiKey for parts (prototype sourcing) \|
9	\| `mouser` \| Search Mouser for parts (secondary prototype source) \|
10	\| `lcsc` \| Search LCSC for parts (production sourcing, JLCPCB) \|
11	\| `element14` \| Search Newark/Farnell/element14 (international sourcing, reliable datasheets) \|
12	\| `jlcpcb` \| PCB fabrication & assembly ordering \|
13	\| `pcbway` \| Alternative PCB fabrication & assembly \|
14	\| `spice` \| SPICE simulation verification of detected subcircuits \|
15	\| `emc` \| EMC pre-compliance risk analysis — consumes schematic + PCB analyzer output \|
16
17	Handoff guidance: Use this skill to parse schematics/PCBs and extract structured data. Hand off to `bom` for BOM enrichment, pricing, and ordering. Hand off to `digikey`/`mouser`/`lcsc`/`element14` for part searches and datasheet fetching. Hand off to `jlcpcb`/`pcbway` for fabrication ordering and DFM rule validation. Always run `spice` for simulation verification during design reviews when any SPICE simulator is installed (check with `which ngspice ltspice xyce`). Always run `emc` for EMC pre-compliance risk analysis during design reviews when both schematic and PCB analysis are available. These are not optional — skipping them leaves value-computation errors and EMC risks undetected.
18
19	Before analysis: When the user asks to analyze or review a KiCad project, check whether a `datasheets/` directory exists in the project. If not, and DigiKey API keys are available (`DIGIKEY_CLIENT_ID`), offer to sync datasheets first: "I can download datasheets for your components before analysis — this enables pin-level verification and decoupling validation against manufacturer specs. Want me to sync them?" If the user declines or no API keys are set, proceed without datasheets — the analysis works without them but datasheet verification findings won't be available.
20
21	If you see a `DS-001` finding in the analyzer output (severity `high`, detector `audit_datasheet_coverage`), the review cannot make any verified claim. Stop and either (a) run the datasheet sync via `digikey` / `mouser` / `lcsc` / `element14` (whichever has credentials/stock), (b) populate MPNs on the BOM parts, or (c) state explicitly in the report that every pin-level, electrical, and regulator finding is consistency only — do not use the words "verified", "confirmed", or "per datasheet" anywhere. `DS-002` (datasheets missing but MPNs set) and `DS-003` (partial MPN coverage) are softer variants with the same implication for the parts they cite.
22
23	## Design Review Contract
24
25	When the user asks for a design review, complete report, ready-to-fab assessment, or anything equivalent, do not stop at running one or two analyzers and summarizing their findings. A design review in this skill has a stricter contract:
26
27	1. Read the full workflow in this `SKILL.md`, not just the analyzer command sections.
28	2. Read `references/report-generation.md` before writing the report.
29	3. Run every applicable analyzer for the files present in the project, then say explicitly which ones were and were not run.
30	4. Perform raw-file and datasheet cross-verification before claiming anything is "verified".
31	5. Triage likely analyzer false positives before elevating them into blockers.
32	6. If a required step could not be done, state it as a review gap, not as silent omission.
33
34	Treat this as the minimum bar. Analyzer JSON alone is not the final review.
35
36	### Minimum Review Checklist
37
38	For a full design review, explicitly account for each item below in the report:
39
40	- `datasheets/` present, synced, or verification gap stated
41	- `analyze_schematic.py`
42	- `analyze_pcb.py --full`
43	- `cross_analysis.py`
44	- `analyze_emc.py`
45	- SPICE simulation when any simulator is installed
46	- `analyze_thermal.py` when both schematic and PCB JSON exist
47	- `analyze_gerbers.py` when

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kicad

451installs59forks

View on GitHub

How to install kicad?

aklofas/kicad-happy/kicad

$npx -y skills add aklofas/kicad-happy --skill kicad

Installs into the current project.

Summary

Files · 1

View on GitHub

SKILL.md

1	# KiCad Project Analysis Skill
2
3	## Related Skills
4
5	\| Skill \| Purpose \|
6	\|-------\|---------\|
7	\| `bom` \| BOM extraction, enrichment, ordering, and export workflows \|
8	\| `digikey` \| Search DigiKey for parts (prototype sourcing) \|
9	\| `mouser` \| Search Mouser for parts (secondary prototype source) \|
10	\| `lcsc` \| Search LCSC for parts (production sourcing, JLCPCB) \|
11	\| `element14` \| Search Newark/Farnell/element14 (international sourcing, reliable datasheets) \|
12	\| `jlcpcb` \| PCB fabrication & assembly ordering \|
13	\| `pcbway` \| Alternative PCB fabrication & assembly \|
14	\| `spice` \| SPICE simulation verification of detected subcircuits \|
15	\| `emc` \| EMC pre-compliance risk analysis — consumes schematic + PCB analyzer output \|
16
17	Handoff guidance: Use this skill to parse schematics/PCBs and extract structured data. Hand off to `bom` for BOM enrichment, pricing, and ordering. Hand off to `digikey`/`mouser`/`lcsc`/`element14` for part searches and datasheet fetching. Hand off to `jlcpcb`/`pcbway` for fabrication ordering and DFM rule validation. Always run `spice` for simulation verification during design reviews when any SPICE simulator is installed (check with `which ngspice ltspice xyce`). Always run `emc` for EMC pre-compliance risk analysis during design reviews when both schematic and PCB analysis are available. These are not optional — skipping them leaves value-computation errors and EMC risks undetected.
18
19	Before analysis: When the user asks to analyze or review a KiCad project, check whether a `datasheets/` directory exists in the project. If not, and DigiKey API keys are available (`DIGIKEY_CLIENT_ID`), offer to sync datasheets first: "I can download datasheets for your components before analysis — this enables pin-level verification and decoupling validation against manufacturer specs. Want me to sync them?" If the user declines or no API keys are set, proceed without datasheets — the analysis works without them but datasheet verification findings won't be available.
20
21	If you see a `DS-001` finding in the analyzer output (severity `high`, detector `audit_datasheet_coverage`), the review cannot make any verified claim. Stop and either (a) run the datasheet sync via `digikey` / `mouser` / `lcsc` / `element14` (whichever has credentials/stock), (b) populate MPNs on the BOM parts, or (c) state explicitly in the report that every pin-level, electrical, and regulator finding is consistency only — do not use the words "verified", "confirmed", or "per datasheet" anywhere. `DS-002` (datasheets missing but MPNs set) and `DS-003` (partial MPN coverage) are softer variants with the same implication for the parts they cite.
22
23	## Design Review Contract
24
25	When the user asks for a design review, complete report, ready-to-fab assessment, or anything equivalent, do not stop at running one or two analyzers and summarizing their findings. A design review in this skill has a stricter contract:
26
27	1. Read the full workflow in this `SKILL.md`, not just the analyzer command sections.
28	2. Read `references/report-generation.md` before writing the report.
29	3. Run every applicable analyzer for the files present in the project, then say explicitly which ones were and were not run.
30	4. Perform raw-file and datasheet cross-verification before claiming anything is "verified".
31	5. Triage likely analyzer false positives before elevating them into blockers.
32	6. If a required step could not be done, state it as a review gap, not as silent omission.
33
34	Treat this as the minimum bar. Analyzer JSON alone is not the final review.
35
36	### Minimum Review Checklist
37
38	For a full design review, explicitly account for each item below in the report:
39
40	- `datasheets/` present, synced, or verification gap stated
41	- `analyze_schematic.py`
42	- `analyze_pcb.py --full`
43	- `cross_analysis.py`
44	- `analyze_emc.py`
45	- SPICE simulation when any simulator is installed
46	- `analyze_thermal.py` when both schematic and PCB JSON exist
47	- `analyze_gerbers.py` when

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6 picks

Type