qspi-xip-flash-debug

Name: qspi-xip-flash-debug
Author: easyzoom

22stars2forks

How to install qspi-xip-flash-debug?

easyzoom/aix-skills/qspi-xip-flash-debug

$npx -y skills add easyzoom/aix-skills --skill qspi-xip-flash-debug

Installs into the current project.

Summary

Use when debugging QSPI or OSPI NOR flash, execute-in-place XIP, memory-mapped mode, boot from external flash, cache coherency, dummy cycles, or flash timing

Files · 1

View on GitHub

SKILL.md

1	# QSPI XIP Flash Debug
2
3	## Overview
4
5	Use this skill to debug QSPI/OSPI flash by separating electrical bring-up,
6	command mode access, memory-mapped mode, cache policy, linker placement, and
7	boot flow. XIP failures often come from timing and memory attributes.
8
9	## When To Use
10
11	Use this skill when:
12
13	- The user is bringing up external NOR flash over QSPI, OSPI, OctoSPI, FlexSPI,
14	SPIFI, or a similar controller.
15	- The issue involves JEDEC ID reads, erase/program failures, memory-mapped mode,
16	XIP, boot from external flash, random hard faults, or cache corruption.
17	- The firmware uses external flash for code, assets, filesystem, OTA slots, or
18	mapped resources.
19
20	Do not use this skill for generic internal flash programming. Use
21	`mcu-flashing-debug` or `bootloader-debug` instead.
22
23	## First Questions
24
25	Ask for:
26
27	- MCU/SoC, external flash part number, controller, board schematic, and voltage.
28	- Mode: single/dual/quad/octal, SDR/DDR, memory-mapped, XIP, or command mode.
29	- Clock speed, dummy cycles, sample shifting, CS timing, and vendor init table.
30	- Linker script, boot ROM expectations, vector location, and cache/MPU settings.
31	- Current symptom, JEDEC ID, status registers, and logic analyzer trace if any.
32
33	## Debug Workflow
34
35	1. Prove command mode slowly.
36	Read JEDEC ID, status registers, erase, program, and readback at conservative
37	speed before enabling memory mapping.
38
39	1. Match flash mode entry.
40	Confirm QE bit, opcode set, address width, dummy cycles, wrap mode, and reset
41	sequence for the exact flash.
42
43	1. Validate memory-mapped mode.
44	Read known patterns from mapped address space and compare with command-mode
45	reads.
46
47	1. Configure cache and MPU.
48	Mark flash XIP as executable/cacheable as appropriate, and device registers
49	as non-cacheable device memory.
50
51	1. Align linker and boot flow.
52	Place vectors, code, rodata, assets, and load addresses according to boot ROM
53	and startup expectations.
54
55	1. Stress timing.
56	Test temperature, voltage, max clock, deep power-down, reset, and suspend
57	states after the basic path works.
58
59	## Common Failures
60
61	- Flash part has different dummy cycles or QE-bit location than the example.
62	- Memory-mapped reads work at low speed but fail at production clock.
63	- Linker places writable data or vectors in XIP flash incorrectly.
64	- Cache is enabled without invalidation after programming external flash.
65	- Boot ROM expects a different image header or flash mode.
66	- Deep power-down or reset leaves flash in a mode the controller does not expect.
67
68	## Verification
69
70	Before claiming QSPI/XIP works:
71
72	- State flash part, controller, mode, clock, opcode set, and dummy cycles.
73	- Confirm JEDEC ID, erase/program/readback, and mapped reads.
74	- Confirm linker placement, vector/boot path, and cache/MPU attributes.
75	- Confirm reset and cold boot from the selected flash state.
76
77	## Example
78
79	User:
80
81	```text
82	QSPI XIP 开 cache 后随机 hardfault。
83	```
84
85	Agent:
86
87	1. Checks mapped flash attributes, linker placement, and fault address.
88	1. Compares command-mode and memory-mapped reads.
89	1. Verifies cache invalidation after programming and MPU region setup.

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qspi-xip-flash-debug

22stars2forks

View on GitHub

How to install qspi-xip-flash-debug?

easyzoom/aix-skills/qspi-xip-flash-debug

$npx -y skills add easyzoom/aix-skills --skill qspi-xip-flash-debug

Installs into the current project.

Summary

Use when debugging QSPI or OSPI NOR flash, execute-in-place XIP, memory-mapped mode, boot from external flash, cache coherency, dummy cycles, or flash timing

Files · 1

View on GitHub

SKILL.md

1	# QSPI XIP Flash Debug
2
3	## Overview
4
5	Use this skill to debug QSPI/OSPI flash by separating electrical bring-up,
6	command mode access, memory-mapped mode, cache policy, linker placement, and
7	boot flow. XIP failures often come from timing and memory attributes.
8
9	## When To Use
10
11	Use this skill when:
12
13	- The user is bringing up external NOR flash over QSPI, OSPI, OctoSPI, FlexSPI,
14	SPIFI, or a similar controller.
15	- The issue involves JEDEC ID reads, erase/program failures, memory-mapped mode,
16	XIP, boot from external flash, random hard faults, or cache corruption.
17	- The firmware uses external flash for code, assets, filesystem, OTA slots, or
18	mapped resources.
19
20	Do not use this skill for generic internal flash programming. Use
21	`mcu-flashing-debug` or `bootloader-debug` instead.
22
23	## First Questions
24
25	Ask for:
26
27	- MCU/SoC, external flash part number, controller, board schematic, and voltage.
28	- Mode: single/dual/quad/octal, SDR/DDR, memory-mapped, XIP, or command mode.
29	- Clock speed, dummy cycles, sample shifting, CS timing, and vendor init table.
30	- Linker script, boot ROM expectations, vector location, and cache/MPU settings.
31	- Current symptom, JEDEC ID, status registers, and logic analyzer trace if any.
32
33	## Debug Workflow
34
35	1. Prove command mode slowly.
36	Read JEDEC ID, status registers, erase, program, and readback at conservative
37	speed before enabling memory mapping.
38
39	1. Match flash mode entry.
40	Confirm QE bit, opcode set, address width, dummy cycles, wrap mode, and reset
41	sequence for the exact flash.
42
43	1. Validate memory-mapped mode.
44	Read known patterns from mapped address space and compare with command-mode
45	reads.
46
47	1. Configure cache and MPU.
48	Mark flash XIP as executable/cacheable as appropriate, and device registers
49	as non-cacheable device memory.
50
51	1. Align linker and boot flow.
52	Place vectors, code, rodata, assets, and load addresses according to boot ROM
53	and startup expectations.
54
55	1. Stress timing.
56	Test temperature, voltage, max clock, deep power-down, reset, and suspend
57	states after the basic path works.
58
59	## Common Failures
60
61	- Flash part has different dummy cycles or QE-bit location than the example.
62	- Memory-mapped reads work at low speed but fail at production clock.
63	- Linker places writable data or vectors in XIP flash incorrectly.
64	- Cache is enabled without invalidation after programming external flash.
65	- Boot ROM expects a different image header or flash mode.
66	- Deep power-down or reset leaves flash in a mode the controller does not expect.
67
68	## Verification
69
70	Before claiming QSPI/XIP works:
71
72	- State flash part, controller, mode, clock, opcode set, and dummy cycles.
73	- Confirm JEDEC ID, erase/program/readback, and mapped reads.
74	- Confirm linker placement, vector/boot path, and cache/MPU attributes.
75	- Confirm reset and cold boot from the selected flash state.
76
77	## Example
78
79	User:
80
81	```text
82	QSPI XIP 开 cache 后随机 hardfault。
83	```
84
85	Agent:
86
87	1. Checks mapped flash attributes, linker placement, and fault address.
88	1. Compares command-mode and memory-mapped reads.
89	1. Verifies cache invalidation after programming and MPU region setup.

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