virtual-memory-paging-and-tlb

Name: virtual-memory-paging-and-tlb
Author: mohitmishra786

141stars19forks

How to install virtual-memory-paging-and-tlb?

mohitmishra786/low-level-dev-skills/virtual-memory-paging-and-tlb

$npx -y skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb

Installs into the current project.

Summary

Virtual memory skill for paging, page tables, and TLB. Use when explaining page faults, multi-level page tables, TLB behavior, or virtual vs physical addressing. Activates on queries about virtual memory, page table, TLB, page fault, mmap paging, or x86-64 paging.

Files · 1

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SKILL.md

1	# Virtual Memory, Paging, and TLB
2
3	## Purpose
4
5	Explain virtual memory: paging, multi-level page tables, TLB role, page faults, and address translation — bridging OS kernels, embedded MPU, and performance analysis.
6
7	## When to Use
8
9	- Understanding `mmap`, `brk`, and demand paging
10	- Debugging segfaults and guard pages
11	- Huge pages / TLB pressure tuning
12	- Contrasting Cortex-M MPU with full MMU systems
13
14	## Workflow
15
16	### 1. Translation overview
17
18	```
19	Virtual address (VA)
20	├── TLB lookup → physical on hit
21	└── TLB miss → page table walk → fill TLB
22	├── valid PTE → physical address
23	└── invalid → page fault (OS handles)
24	```
25
26	### 2. Page table (x86-64 4-level example)
27
28	```
29	CR3 → PML4 → PDPT → PD → PT → physical frame
30	```
31
32	Linux on x86_64 uses 4 KiB pages (default) and optional 2 MiB / 1 GiB huge pages.
33
34	### 3. Page fault types (simplified)
35
36	\| Fault \| Typical cause \|
37	\|-------\|----------------\|
38	\| Major \| Disk read — file-backed page not in RAM \|
39	\| Minor \| Zero-fill or COW break \|
40	\| Protection \| User access to kernel page, W^X violation \|
41
42	```bash
43	# Linux page fault stats
44	grep pgfault /proc/vmstat
45	```
46
47	### 4. TLB pressure
48
49	Large sparse address spaces + random pointer chasing → TLB misses dominate.
50
51	Mitigations:
52
53	- `mmap` huge pages (`MAP_HUGETLB`, `madvise(MADV_HUGEPAGE)`)
54	- Smaller working set / better locality
55	- `numactl --membind` for NUMA
56
57	### 5. Embedded contrast (Cortex-M)
58
59	Many MCUs use MPU (region-based) not full paging — no TLB, fixed region count. Application processors use MMU + OS.
60
61	See `skills/platform/riscv-privileged` for Sv39/Sv48.
62
63	### 6. Userspace inspection (Linux)
64
65	```bash
66	cat /proc/self/maps
67	pmap -x $$
68	```
69
70	### 7. Agent usage
71
72	```
73	/virtual-memory-paging-and-tlb Explain why 4 KiB random access hurts TLB and hugepage helps
74	```
75
76	## Common Problems
77
78	\| Symptom \| Cause \| Fix \|
79	\|---------\|-------\|-----\|
80	\| Segfault \| Unmapped VA \| Fix pointer; check `maps` \|
81	\| Slow mmap workload \| TLB thrashing \| Huge pages; reduce regions \|
82	\| COW spike after fork \| Shared pages split on write \| Expected; consider `MAP_POPULATE` \|
83	\| W^X fault \| JIT without mprotect dance \| Separate RW and RX mappings \|
84	\| Wrong phys on MCU \| No MMU — linear map \| Use linker script addresses \|
85
86	## Related Skills
87
88	- `skills/computer-architecture/memory-hierarchy-and-caches` — cache after translation
89	- `skills/kernel-dev/kernel-memory-management` — kernel page allocator
90	- `skills/kernel/os-dev-scratch` — build paging from scratch
91	- `skills/platform/riscv-privileged` — Sv39 page tables
92	- `skills/allocators/numa-programming` — NUMA and migration

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virtual-memory-paging-and-tlb

141stars19forks

View on GitHub

How to install virtual-memory-paging-and-tlb?

mohitmishra786/low-level-dev-skills/virtual-memory-paging-and-tlb

$npx -y skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb

Installs into the current project.

Summary

Files · 1

View on GitHub

SKILL.md

1	# Virtual Memory, Paging, and TLB
2
3	## Purpose
4
5	Explain virtual memory: paging, multi-level page tables, TLB role, page faults, and address translation — bridging OS kernels, embedded MPU, and performance analysis.
6
7	## When to Use
8
9	- Understanding `mmap`, `brk`, and demand paging
10	- Debugging segfaults and guard pages
11	- Huge pages / TLB pressure tuning
12	- Contrasting Cortex-M MPU with full MMU systems
13
14	## Workflow
15
16	### 1. Translation overview
17
18	```
19	Virtual address (VA)
20	├── TLB lookup → physical on hit
21	└── TLB miss → page table walk → fill TLB
22	├── valid PTE → physical address
23	└── invalid → page fault (OS handles)
24	```
25
26	### 2. Page table (x86-64 4-level example)
27
28	```
29	CR3 → PML4 → PDPT → PD → PT → physical frame
30	```
31
32	Linux on x86_64 uses 4 KiB pages (default) and optional 2 MiB / 1 GiB huge pages.
33
34	### 3. Page fault types (simplified)
35
36	\| Fault \| Typical cause \|
37	\|-------\|----------------\|
38	\| Major \| Disk read — file-backed page not in RAM \|
39	\| Minor \| Zero-fill or COW break \|
40	\| Protection \| User access to kernel page, W^X violation \|
41
42	```bash
43	# Linux page fault stats
44	grep pgfault /proc/vmstat
45	```
46
47	### 4. TLB pressure
48
49	Large sparse address spaces + random pointer chasing → TLB misses dominate.
50
51	Mitigations:
52
53	- `mmap` huge pages (`MAP_HUGETLB`, `madvise(MADV_HUGEPAGE)`)
54	- Smaller working set / better locality
55	- `numactl --membind` for NUMA
56
57	### 5. Embedded contrast (Cortex-M)
58
59	Many MCUs use MPU (region-based) not full paging — no TLB, fixed region count. Application processors use MMU + OS.
60
61	See `skills/platform/riscv-privileged` for Sv39/Sv48.
62
63	### 6. Userspace inspection (Linux)
64
65	```bash
66	cat /proc/self/maps
67	pmap -x $$
68	```
69
70	### 7. Agent usage
71
72	```
73	/virtual-memory-paging-and-tlb Explain why 4 KiB random access hurts TLB and hugepage helps
74	```
75
76	## Common Problems
77
78	\| Symptom \| Cause \| Fix \|
79	\|---------\|-------\|-----\|
80	\| Segfault \| Unmapped VA \| Fix pointer; check `maps` \|
81	\| Slow mmap workload \| TLB thrashing \| Huge pages; reduce regions \|
82	\| COW spike after fork \| Shared pages split on write \| Expected; consider `MAP_POPULATE` \|
83	\| W^X fault \| JIT without mprotect dance \| Separate RW and RX mappings \|
84	\| Wrong phys on MCU \| No MMU — linear map \| Use linker script addresses \|
85
86	## Related Skills
87
88	- `skills/computer-architecture/memory-hierarchy-and-caches` — cache after translation
89	- `skills/kernel-dev/kernel-memory-management` — kernel page allocator
90	- `skills/kernel/os-dev-scratch` — build paging from scratch
91	- `skills/platform/riscv-privileged` — Sv39 page tables
92	- `skills/allocators/numa-programming` — NUMA and migration

People who liked this also viewed

6 picks

Type